Job Details
Join companies design verification team in verifying the high-speed mixed-signal IP designs (PCIe, USB, MIPI, CXL, C2C, D2D, DDR, PLL, DAC, ADC, Sensors, etc.) for exciting products targeted for 5G, AI/ML, compute, IOT, and automotive applications. The team is responsible for the complete design verification lifecycle, from system-level concept to tape out and post-silicon support.
Responsibilities:
Define pre-silicon and post-silicon test plans based on design specs and using applicable standards working closely with design team.
Architect and develop the testbench using advanced verification methodology such as System Verilog/UVM, Analog/mixed signal simulation, Low power verification, Formal verification and Gate level simulation to ensure high design quality.
Aware of Power aware verification methodology in SV/UVM environment to support coverage and assertions.
Author assertions in SVA, develop testcases, coverage models, debug and ensure coverage closure.
Work with digital design, analog circuit design, modeling, controller/subsystem, & SoC integration teams to complete the successful PHY level verification, integration into subsystem and SoC, and post-silicon validation.